# Reverse engineering mode **URL:** \ **Category:** Improvement Ideas\ **Created:** [December 14, 2018, 7:30pm UTC](https://librepcb.discourse.group/t/reverse-engineering-mode/21 "2018-12-14T19:30:10Z")\ **Posts on this page:** 8\ **Page:** 1
**Author:** ![import](https://avatars.discourse-cdn.com/v4/letter/i/4da419/32.png) [@import](https://librepcb.discourse.group/u/import)\ **Post date:** [December 14, 2018, 7:30pm UTC](https://librepcb.discourse.group/t/reverse-engineering-mode/21/1 "2018-12-14T19:30:11Z")
_From @Harvie on Thu Nov 29 2018 12:13:00 GMT+0000 (UTC)_ If i try to create connection in “Board editor” window and that connection is not already in schematic, it gives me following error: ![image](https://global.discourse-cdn.com/free1/uploads/librepcb1/original/1X/b9faed5b0721b2827c09e903f1d17889ea5b9ec5.png) And that is perfectly OK. But what if i am reverse engineering the board. I have photos of board and i want to recreate the same board in Board editor and turn that into a schematic. (given that i’ve already added all the components to the schematic). That would help me to untangle the connections on the board to usable schematic… I still think this should not be enabled by default. Surely i don’t want to screw with the schematic by accidentaly adding new connections when making board from schematic. But having option to enable this mode (with proper warning dialog) would be great. _Copied from original issue: [https://github.com/LibrePCB/librepcb-rfcs/issues/40](https://github.com/LibrePCB/librepcb-rfcs/issues/40)_ ---
**Author:** ![import](https://avatars.discourse-cdn.com/v4/letter/i/4da419/32.png) [@import](https://librepcb.discourse.group/u/import)\ **Post date:** [December 14, 2018, 7:30pm UTC](https://librepcb.discourse.group/t/reverse-engineering-mode/21/2 "2018-12-14T19:30:14Z")
_From @ubruhin on Thu Nov 29 2018 14:02:33 GMT+0000 (UTC)_ I have this use-case in mind since the beginning of LibrePCB because I also like to have this feature 🙂 The core classes should be (more or less) ready for that feature, but the schematic and board editors aren’t, so they have to be extended. > I still think this should not be enabled by default. Surely i don’t want to screw with the schematic by accidentaly adding new connections when making board from schematic. But having option to enable this mode (with proper warning dialog) would be great. 👍 ---
**Author:** ![EdizonTN](https://yyz2.discourse-cdn.com/free1/user_avatar/librepcb.discourse.group/edizontn/32/222_2.png) [@EdizonTN](https://librepcb.discourse.group/u/EdizonTN)\ **Post date:** [November 17, 2020, 8:54pm UTC](https://librepcb.discourse.group/t/reverse-engineering-mode/21/3 "2020-11-17T20:54:04Z")
I know, Is exist here idea for advanced reverse engineering mode - [Reverse engineering mode](https://librepcb.discourse.group/t/reverse-engineering-mode/21). But what if you would integrate basic version of the Reverse Engineering Mode? It’s simple - add a possibility to set background image into the PCB editor (into a new layers “Top - Bottom Background or Template” ) Example: 1. Catch a photo of the unknown hacked/copied board. Top and bottom independently. 2. Import these photo into LibrePCB - PCB Editor. **Top** image into **Top Background Layer** and nice versa. 3. Set **transparency** for both photo. Grid have to be over photo. 4. Edit and Align the image via a new functions: Move/resize/mirror/skew of the both images.Grid will be a helper. 5. Lock the images (prevent editing) Now if during routing is selected **Top Copper** layer as active layer, Top Background will shown (with preset transparency). If is selected Bottom Copper layer as active, bottom background is shown. By this way we able to place component and draw traces by the “template”. This basic function is not for create/edit schematic. Is only for copy of the PCB from the real one. Schematic have to be done by the oldschool manual way (paper+pencil) and after this can be drawed by the LibrePCB schematic editor. But PCB can be done 1:1 (very close to origin) using this method. ---
**Author:** ![sswcharlie](https://avatars.discourse-cdn.com/v4/letter/s/a3d4f5/32.png) [@sswcharlie](https://librepcb.discourse.group/u/sswcharlie)\ **Post date:** [November 23, 2020, 12:55am UTC](https://librepcb.discourse.group/t/reverse-engineering-mode/21/4 "2020-11-23T00:55:58Z")
Is there a video of this someplace showing an example of how to put together. Thanks ---
**Author:** ![EdizonTN](https://yyz2.discourse-cdn.com/free1/user_avatar/librepcb.discourse.group/edizontn/32/222_2.png) [@EdizonTN](https://librepcb.discourse.group/u/EdizonTN)\ **Post date:** [November 23, 2020, 5:58am UTC](https://librepcb.discourse.group/t/reverse-engineering-mode/21/5 "2020-11-23T05:58:03Z")
Looks so [this](https://www.youtube.com/watch?v=hJXhTmiFj3Y). ---
**Author:** ![michelu1](https://avatars.discourse-cdn.com/v4/letter/m/d2c977/32.png) [@michelu1](https://librepcb.discourse.group/u/michelu1)\ **Post date:** [May 15, 2022, 5:10pm UTC](https://librepcb.discourse.group/t/reverse-engineering-mode/21/6 "2022-05-15T17:10:46Z")
I saw it on the todo list. Any chance to have this implemented soon? Seems to me very useful for maintenance usage, to fix a card if you don’t have the schematics. ---
**Author:** ![ubruhin](https://avatars.discourse-cdn.com/v4/letter/u/c89c15/32.png) [@ubruhin](https://librepcb.discourse.group/u/ubruhin)\ **Post date:** [May 17, 2022, 4:05pm UTC](https://librepcb.discourse.group/t/reverse-engineering-mode/21/7 "2022-05-17T16:05:24Z")
Nope, so far there is no concrete idea when it will be implemented… ---
**Author:** ![z3ugma](https://yyz2.discourse-cdn.com/free1/user_avatar/librepcb.discourse.group/z3ugma/32/385_2.png) [@z3ugma](https://librepcb.discourse.group/u/z3ugma)\ **Post date:** [May 6, 2025, 6:44pm UTC](https://librepcb.discourse.group/t/reverse-engineering-mode/21/8 "2025-05-06T18:44:04Z")
The functionality implemented in [Support adding images to schematics · Issue #1271 · LibrePCB/LibrePCB · GitHub](https://github.com/LibrePCB/LibrePCB/issues/1271) now allows me to do some measure of reverse-engineering. As a workaround, using the Library Manager and the footprint editor, but not the full PCB editor.