Most EDA software allows the user to define the pins function at symbol/component level. This allows the performing of further ERC checks to look for non driven nets, nets driven by multiple sources, nets driven by only open collector pins etc.
What I miss most importantly from the other EDA software what I know: the ability to override the pin directions in the schematic itself. For microcontrollers usually the IO pins functions are set to IO which could hide ERC issues. If such an “pin function override in schematic feature” would be available users could develop pin function importer to import pin functions from ST CubeMX projects for e.g.
In the case if @ubruhin you see potential in this I would suggest to create a list from the pin functions and possible ERC checks and I could contribute to these things implementation
Yes of course we need pin functions Actually component signals already have an attribute for that, but the UI does not yet allow to view/edit them. Currently the following signal functions are implemented:
- passive
- power
- input
- output
- I/O
- open drain
Although I’m not sure if that makes sense… Any suggestions welcome
Hmm yeah, sounds reasonable but also introduces quite some more complexity.
That would be great!
1 Like
Actually component signals already have an attribute for that, but the UI does not yet allow to view/edit them.
Sounds great!
The pin function list above looks to be quite similar to my plans. I am familiar with Autodesk EAGLE which has the following additional functions:
- NC - Utilize this function would be useful I think
- HiZ - This one could be useful as well
- Supply - In EAGLE basically it adds similar behavior to pin which is the “Forced Net” feature in LibrePCB just automatically with the pin name.
At this point I started to think that it might be useful to leverage this behavior: it would simplify the UI, and at the moment I cannot think about a scenario where I would want to automatically assign a net name to a pin with a name other than the pin’s name. But that’s just my 50 cents.
Now it’s time to see how long does it takes to compile LibrePCB on my 2nd gen mobile i7
1 Like